Project
Embedded Design — FUSE FS & RISC-V Datapath
- C++
- SystemVerilog
- RISC-V
- MIPS
- Operating Systems
Two systems-level projects from my embedded design coursework: a Unix-style FUSE file system in C++ and a complete CPU datapath in SystemVerilog supporting both RISC-V and MIPS instruction sets.
Overview
Two systems-level projects: a Unix-style FUSE file system in C++ with block-storage architecture, nested directories, bitmap resource tracking, and file I/O syscall handling; and a full CPU datapath implemented in SystemVerilog/Verilog using both RISC-V and MIPS instruction sets.
FUSE file system
A user-space file system written in C++ with a block-storage backend, nested directories, bitmap-tracked resource allocation, and handlers for the standard file I/O syscalls (open, read, write, mkdir, unlink, etc.). The goal was to internalize how a real FS lays out blocks and metadata, not just how to call into one.
RISC-V / MIPS datapath
A full single-cycle CPU datapath in SystemVerilog/Verilog — register file, ALU, control unit, memory interface — capable of executing both the RISC-V and MIPS instruction sets. Each ISA forced different control-signal decisions and made the contrast between the two architectures concrete in a way reading a textbook does not.